Dynamic Random Access Memory Semiconductors from the Republic of Korea: Preliminary Results of Countervailing Duty Administrative Review

Document Headings Document headings vary by document type but may contain the following: the agency or agencies that issued and signed a document the number of the CFR title and the number of each part the document amends, proposes to amend, or is directly related to the agency docket number / agency internal file number the RIN which identifies each regulatory action listed in the Unified Agenda of Federal Regulatory and Deregulatory Actions See the Document Drafting Handbook for more details. Department of Commerce International Trade Administration [C-580-851] AGENCY: Import Administration, International Trade Administration, Department of Commerce. SUMMARY: The Department of Commerce is conducting an administrative review of the countervailing duty order on dynamic random access memory semiconductors from the Republic of Korea for the period January 1, 2007, through December 31, 2007. We preliminarily find that Hynix Semiconductor, Inc. received countervailable subsidies during the period of review, which result in a de minimis subsidy rate. If these preliminary results are adopted in our final results of this review, we will instruct U.S. Customs and Border Protection not to assess countervailing duties as detailed in the “Preliminary Results of Review” section of this notice. Interested parties are invited to comment on these preliminary results. See the “Public Comment” section of this notice. EFFECTIVE DATE: August 4, 2009. FOR FURTHER INFORMATION CONTACT: David Neubacher or Shane Subler, Office of AD/CVD Operations, Office 1, Import Administration, International Trade Administration, U.S. Department of Commerce, Room 3069, 14th Street and Constitution Avenue, NW, Washington, DC 20230; telephone: (202) 482-5823 and (202) 482-0189, respectively. SUPPLEMENTARY INFORMATION: Background On August 11, 2003, the Department of Commerce (“the Department”) published a countervailing duty order on dynamic random access memory semicon…